今日のGR-PEACH

実に8ヶ月ぶりにシリアルの初期化部分をデータシート通りに書きなおしたら "rza1uart0: console" が出るように。

↓前回

ただし ”root device: ” の後に

  • 適当なキー(”a”とか)を押すと、その文字を表示してフリーズ
  • ENTERのみ "use one of: ddb halt reboot" となった後に再度 "root device: " になるけど、14回ENTER繰り返したところでpanic

となるんで入力回りがまだ怪しい感じがする。

U-Boot 2015.01-00076-gc83df16e6b-dirty (Jul 06 2017 - 01:45:26)

I2C:   ready
DRAM:  10 MiB
Using default environment

In:    serial
Out:   serial
Err:   serial
                      SPI Flash Memory Map
                ------------------------------------
                         Start      Size     SPI
                u-boot:  0x00000000 0x080000 0
                   env:  0x00080000 0x040000 0
                    DT:  0x000C0000 0x040000 0
                Kernel:  0x00100000 0x050000 0
                Rootfs:  0x00600000 0x0A0000 0
Net:   sh_eth
=> bootp 192.168.0.5:netbsd.bin
sh_eth Waiting for PHY auto negotiation to complete.. done
sh_eth: 100Base/Full
BOOTP broadcast 1
BOOTP broadcast 2
DHCP client bound to address 192.168.0.8 (620 ms)
Using sh_eth device
TFTP from server 192.168.0.5; our IP address is 192.168.0.8
Filename 'netbsd.bin'.
Load address: 0x20000000
Loading: #################################################################
         #################################################################
         #################################################################
         ####################################
         2.8 MiB/s
done
Bytes transferred = 3378388 (338cd4 hex)
=> go 0x20000000
## Starting application at 0x20000000 ...
  PC=0x20000024
  SP=0x208afdb0
CPSR=0x600001d3
<cortex_init>@ABC12-</cortex_init>
<mmu_init_table></mmu_init_table>
<arm_cpuinit>FG01H1IJKLM</arm_cpuinit>
jump to start()

uboot arg = 0x1, 0x208b0e5c, 0x208b0e5c, 0x20000000

NetBSD/evbarm (EVBARM_BOARDTYPE) booting ...
initarm: Configuring system, CLIDR=1110000003 CTR=0x83338003
arm32_bootmem_init: memstart=0x20000000, memsize=0xa00000, kernelstart=0x20000000
arm32_bootmem_init: kernelend=0x20356000
arm32_bootmem_init: adding 853 free pages: [0x20356000..0x209fffff] (VA 0x80356000)
arm32_kernel_vm_init: 1 L2 pages are needed to map 0x38a000 kernel bytes
arm32_kernel_vm_init: allocating page tables for kerneladd_pages: adding pv 0x80339414 (pa 0x20356000, va 0x80356000, 1 pages) at tail
 vmadd_pages: appending pv 0x8033a390 (0x20358000..0x2035bfff) to 0x20356000..0x20357fff
add_pages: appending pv 0x803395c8 (0x2035c000..0x2035dfff) to 0x20356000..0x2035bfff
add_pages: appending pv 0x803395dc (0x2035e000..0x2035ffff) to 0x20356000..0x2035dfff
add_pages: appending pv 0x803395f0 (0x20360000..0x20361fff) to 0x20356000..0x2035ffff
add_pages: appending pv 0x80339604 (0x20362000..0x20363fff) to 0x20356000..0x20361fff
add_pages: appending pv 0x80339618 (0x20364000..0x20365fff) to 0x20356000..0x20363fff
add_pages: appending pv 0x8033962c (0x20366000..0x20367fff) to 0x20356000..0x20365fff
add_pages: appending pv 0x80339640 (0x20368000..0x20369fff) to 0x20356000..0x20367fff
add_pages: appending pv 0x80339654 (0x2036a000..0x2036bfff) to 0x20356000..0x20369fff
arm32_kernel_vm_init: allocating stacks
add_pages: appending pv 0x80339af0 (0x2036c000..0x2036dfff) to 0x20356000..0x2036bfff
add_pages: appending pv 0x80339adc (0x2036e000..0x2036ffff) to 0x20356000..0x2036dfff
add_pages: appending pv 0x80339ac8 (0x20370000..0x20371fff) to 0x20356000..0x2036ffff
add_pages: appending pv 0x80339ab4 (0x20372000..0x20373fff) to 0x20356000..0x20371fff
add_pages: appending pv 0x80339aa0 (0x20374000..0x20375fff) to 0x20356000..0x20373fff
add_pages: appending pv 0x80339b04 (0x20376000..0x20377fff) to 0x20356000..0x20375fff
add_pages: appending pv 0x80339458 (0x20378000..0x2037bfff) to 0x20356000..0x20377fff
Creating L1 page table at 0x20358000
arm32_kernel_vm_init: adding L2 pt (VA 0x80356000, PA 0x20356000) for VA 0x80000000 (kernel)
arm32_kernel_vm_init: adding L2 pt (VA 0x8035c000, PA 0x2035c000) for VA 0xc0000000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x8035e000, PA 0x2035e000) for VA 0xc0800000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x80360000, PA 0x20360000) for VA 0xc1000000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x80362000, PA 0x20362000) for VA 0xc1800000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x80364000, PA 0x20364000) for VA 0xc2000000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x80366000, PA 0x20366000) for VA 0xc2800000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x80368000, PA 0x20368000) for VA 0xc3000000 (vm)
arm32_kernel_vm_init: adding L2 pt (VA 0x8036a000, PA 0x2036a000) for VA 0xc3800000 (vm)
Mapping kernel
arm32_kernel_vm_init: adding chunk for kernel text 0x20000000..0x20267fff (VA 0x80000000)
add_pages: adding pv 0x80339400 (pa 0x20000000, va 0x80000000, 308 pages) before pa 0x20356000
arm32_kernel_vm_init: adding chunk for kernel data/bss 0x20268000..0x20355fff (VA 0x80268000)
add_pages: adding pv 0x803393ec (pa 0x20268000, va 0x80268000, 119 pages) before pa 0x20356000
Listing Chunks
arm32_kernel_vm_init: pv 0x80339400: chunk VA 0x80000000..0x80267fff (PA 0x20000000, prot 7, cache 1)
arm32_kernel_vm_init: pv 0x803393ec: chunk VA 0x80268000..0x80355fff (PA 0x20268000, prot 3, cache 1)
arm32_kernel_vm_init: pv 0x80339414: chunk VA 0x80356000..0x8037bfff (PA 0x20356000, prot 3, cache 1)

Mapping Chunks
arm32_kernel_vm_init: mapping chunk VA 0x80000000..0x80267fff (PA 0x20000000, prot 7, cache 1)
pmap_map_chunk: pa=0x20000000 va=0x80000000 size=0x268000 resid=0x268000 prot=0x7 cache=1
SSLLLLLLPPPP
arm32_kernel_vm_init: mapping chunk VA 0x80268000..0x80355fff (PA 0x20268000, prot 3, cache 1)
pmap_map_chunk: pa=0x20268000 va=0x80268000 size=0xee000 resid=0xee000 prot=0x3 cache=1
PPPPLLLLLLLLLLLLLLPPP
arm32_kernel_vm_init: mapping last chunk VA 0x80356000..0x8037bfff (PA 0x20356000, prot 3, cache 1)
pmap_map_chunk: pa=0x20356000 va=0x80356000 size=0x26000 resid=0x26000 prot=0x3 cache=1
PPPPPLPPPPPP
devmap: 18000000 -> 1fffffff @ f7000000
pmap_map_chunk: pa=0x18000000 va=0xf7000000 size=0x8000000 resid=0x8000000 prot=0x3 cache=0
sSsSsSsSsSsSsSsS
devmap: 3fe00000 -> 3fffffff @ ff000000
pmap_map_chunk: pa=0x3fe00000 va=0xff000000 size=0x200000 resid=0x200000 prot=0x3 cache=0
SS
devmap: e8000000 -> e82fffff @ ff200000
pmap_map_chunk: pa=0xe8000000 va=0xff200000 size=0x300000 resid=0x300000 prot=0x3 cache=0
SSS
devmap: fc000000 -> fc0fffff @ ff500000
pmap_map_chunk: pa=0xfc000000 va=0xff500000 size=0x100000 resid=0x100000 prot=0x3 cache=0
S
devmap: fcf00000 -> fcffffff @ ff600000
pmap_map_chunk: pa=0xfcf00000 va=0xff600000 size=0x100000 resid=0x100000 prot=0x3 cache=0
S
devmap: fff00000 -> ffffffff @ ff700000
pmap_map_chunk: pa=0xfff00000 va=0xff700000 size=0x100000 resid=0x100000 prot=0x3 cache=0
S
devmap: f0000000 -> f00fffff @ ff800000
pmap_map_chunk: pa=0xf0000000 va=0xff800000 size=0x100000 resid=0x100000 prot=0x3 cache=0
S
                             Physical              Virtual        Num
                       Starting    Ending    Starting    Ending   Pages
               SDRAM: 0x20000000 0x209fffff 0x80000000 0x809fffff 1280
        text section: 0x20000000 0x20267fff 0x80000000 0x80267fff 308
        data section: 0x202c0000 0x20338cd8 0x802c0000 0x80338cd8 61
         bss section: 0x20338cd8 0x20354d98 0x80338cd8 0x80354d98 15
   L1 page directory: 0x20358000 0x2035bfff 0x80358000 0x8035bfff 2
   ABT stack (CPU 0): 0x2036c000 0x2036dfff 0x8036c000 0x8036dfff 1
   FIQ stack (CPU 0): 0x2036e000 0x2036ffff 0x8036e000 0x8036ffff 1
   IRQ stack (CPU 0): 0x20370000 0x20371fff 0x80370000 0x80371fff 1
   UND stack (CPU 0): 0x20372000 0x20373fff 0x80372000 0x80373fff 1
  IDLE stack (CPU 0): 0x20374000 0x20375fff 0x80374000 0x80375fff 1
           SVC stack: 0x20376000 0x20377fff 0x80376000 0x80377fff 1
      Message Buffer: 0x20378000 0x2037bfff 0x80378000 0x8037bfff 2
         Free Memory: 0x2037c000 0x209fffff                       834
TTBR0=0x209fc05b TTBR1=0x209fc05b TTBCR=0x1 CONTEXTIDR=0
switching to new L1 page table @0x20358000... ttb (TTBCR=0x11 TTBR0=0x2035805b TTBR1=0x2035805b) OK
nfreeblocks = 1, free_pages = 834 (0x342)
bootstrap done.
vectors vbar=0x8000c860 0x8000c860
init subsystems: stacks vectors undefined page pmap_physload pmap kpm tlb0 locks l1pt cache(l1pt) specials pools [ Kernel symbol table m]
done.
Loaded initial symtab at 0x802cc000, strtab at 0x802f64d0, # entries 10812
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014, 2015, 2016, 2017
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 8.99.1 (GRPEACH) #126: Sun Aug 19 01:46:47 JST 2018
        star@pavilion.local:/home/star/work/netbsd.rza1h/obj/evbarm/sys/arch/evbarm/compile/GRPEACH
total memory = 10240 KB
avail memory = 6424 KB
sysctl_createv: sysctl_create(machine_arch) returned 17
mainbus0 (root)
cpu0 at mainbus0 core 0: 400 MHz Cortex-A9 r3p0 (Cortex V7A core)
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled
cpu0: 32KB/32B 4-way L1 VIPT Instruction cache
cpu0: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache
cpu0: 128KB/32B 8-way write-back-locking-line L2 PIPT Unified cache
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals
armperiph0 at mainbus0
arml2cc0 at armperiph0: ARM PL310 r3p2 L2 Cache Controller (disabled)
arml2cc0: cache enabled
armgic0 at armperiph0: Generic Interrupt Controller, 32 sources (21 valid)
armgic0: 32 Priorities, 0 SPIs, 5 PPIs, 16 SGIs
a9tmr0 at armperiph0: A9 Global 64-bit Timer (200 MHz)
a9tmr0: interrupting on irq 27
a9wdt0 at armperiph0: A9 Watchdog Timer, default period is 12 seconds
axi0 at mainbus0: Advancd eXtensible Interface
rza1uart0 at axi0 addr 0xe8008000 intr 232
rza1uart0: console
boot device: <unknown>
root device: a